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<title>IRQ Mode Bit-Masks</title>
<title>CMSIS-Core (Cortex-A): IRQ Mode Bit-Masks</title>
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   <div id="projectname">CMSIS-Core (Cortex-A)
   &#160;<span id="projectnumber">Version 1.1.4</span>
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   <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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<div class="header">
  <div class="summary">
<a href="#define-members">Macros</a>  </div>
  <div class="headertitle">
<div class="title">IRQ Mode Bit-Masks<div class="ingroups"><a class="el" href="group__irq__ctrl__gr.html">Interrupts and Exceptions</a></div></div>  </div>
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<div class="contents">

<p>Configure interrupt line mode.  
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:gabc31ba71612436a6ccc49342f35fec58"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gabc31ba71612436a6ccc49342f35fec58">IRQ_MODE_TRIG_LEVEL</a>&#160;&#160;&#160;(0x00UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
<tr class="memdesc:gabc31ba71612436a6ccc49342f35fec58"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: level triggered interrupt.  <a href="group__irq__mode__defs.html#gabc31ba71612436a6ccc49342f35fec58">More...</a><br /></td></tr>
<tr class="separator:gabc31ba71612436a6ccc49342f35fec58"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga326df9e34f6447583895a6f809ee160a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga326df9e34f6447583895a6f809ee160a">IRQ_MODE_TRIG_LEVEL_LOW</a>&#160;&#160;&#160;(0x01UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
<tr class="memdesc:ga326df9e34f6447583895a6f809ee160a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: low level triggered interrupt.  <a href="group__irq__mode__defs.html#ga326df9e34f6447583895a6f809ee160a">More...</a><br /></td></tr>
<tr class="separator:ga326df9e34f6447583895a6f809ee160a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafeb539b2a564ca35abc57f87d71e7206"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gafeb539b2a564ca35abc57f87d71e7206">IRQ_MODE_TRIG_LEVEL_HIGH</a>&#160;&#160;&#160;(0x02UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
<tr class="memdesc:gafeb539b2a564ca35abc57f87d71e7206"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: high level triggered interrupt.  <a href="group__irq__mode__defs.html#gafeb539b2a564ca35abc57f87d71e7206">More...</a><br /></td></tr>
<tr class="separator:gafeb539b2a564ca35abc57f87d71e7206"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa9a8e0968a4ccd57eb7544a16d05f24d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaa9a8e0968a4ccd57eb7544a16d05f24d">IRQ_MODE_TRIG_EDGE</a>&#160;&#160;&#160;(0x04UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
<tr class="memdesc:gaa9a8e0968a4ccd57eb7544a16d05f24d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: edge triggered interrupt.  <a href="group__irq__mode__defs.html#gaa9a8e0968a4ccd57eb7544a16d05f24d">More...</a><br /></td></tr>
<tr class="separator:gaa9a8e0968a4ccd57eb7544a16d05f24d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2dbbbb7100be0fee6e048cd3deb50e28"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga2dbbbb7100be0fee6e048cd3deb50e28">IRQ_MODE_TRIG_EDGE_RISING</a>&#160;&#160;&#160;(0x05UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
<tr class="memdesc:ga2dbbbb7100be0fee6e048cd3deb50e28"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: rising edge triggered interrupt.  <a href="group__irq__mode__defs.html#ga2dbbbb7100be0fee6e048cd3deb50e28">More...</a><br /></td></tr>
<tr class="separator:ga2dbbbb7100be0fee6e048cd3deb50e28"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga99e0f3f6945991d50e766b19e71e0222"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga99e0f3f6945991d50e766b19e71e0222">IRQ_MODE_TRIG_EDGE_FALLING</a>&#160;&#160;&#160;(0x06UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
<tr class="memdesc:ga99e0f3f6945991d50e766b19e71e0222"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: falling edge triggered interrupt.  <a href="group__irq__mode__defs.html#ga99e0f3f6945991d50e766b19e71e0222">More...</a><br /></td></tr>
<tr class="separator:ga99e0f3f6945991d50e766b19e71e0222"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b0142ff767a9b1b1287e638eacf707b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga8b0142ff767a9b1b1287e638eacf707b">IRQ_MODE_TRIG_EDGE_BOTH</a>&#160;&#160;&#160;(0x07UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
<tr class="memdesc:ga8b0142ff767a9b1b1287e638eacf707b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: rising and falling edge triggered interrupt.  <a href="group__irq__mode__defs.html#ga8b0142ff767a9b1b1287e638eacf707b">More...</a><br /></td></tr>
<tr class="separator:ga8b0142ff767a9b1b1287e638eacf707b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab0d022bbd15beb1a6578b5535d95f9cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gab0d022bbd15beb1a6578b5535d95f9cf">IRQ_MODE_TYPE_IRQ</a>&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td></tr>
<tr class="memdesc:gab0d022bbd15beb1a6578b5535d95f9cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Type: interrupt source triggers CPU IRQ line.  <a href="group__irq__mode__defs.html#gab0d022bbd15beb1a6578b5535d95f9cf">More...</a><br /></td></tr>
<tr class="separator:gab0d022bbd15beb1a6578b5535d95f9cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaec01a80010bc42b1482388ce3ae4d2a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaec01a80010bc42b1482388ce3ae4d2a3">IRQ_MODE_TYPE_FIQ</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td></tr>
<tr class="memdesc:gaec01a80010bc42b1482388ce3ae4d2a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Type: interrupt source triggers CPU FIQ line.  <a href="group__irq__mode__defs.html#gaec01a80010bc42b1482388ce3ae4d2a3">More...</a><br /></td></tr>
<tr class="separator:gaec01a80010bc42b1482388ce3ae4d2a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7498851a6a7f3e2c5e087041617f5be7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga7498851a6a7f3e2c5e087041617f5be7">IRQ_MODE_DOMAIN_NONSECURE</a>&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td></tr>
<tr class="memdesc:ga7498851a6a7f3e2c5e087041617f5be7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Domain: interrupt is targeting non-secure domain.  <a href="group__irq__mode__defs.html#ga7498851a6a7f3e2c5e087041617f5be7">More...</a><br /></td></tr>
<tr class="separator:ga7498851a6a7f3e2c5e087041617f5be7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga15cdeb10ef2b8081c5cd7a87e22e65e6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga15cdeb10ef2b8081c5cd7a87e22e65e6">IRQ_MODE_DOMAIN_SECURE</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td></tr>
<tr class="memdesc:ga15cdeb10ef2b8081c5cd7a87e22e65e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Domain: interrupt is targeting secure domain.  <a href="group__irq__mode__defs.html#ga15cdeb10ef2b8081c5cd7a87e22e65e6">More...</a><br /></td></tr>
<tr class="separator:ga15cdeb10ef2b8081c5cd7a87e22e65e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad3d0505689768247c67495b7359e147f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gad3d0505689768247c67495b7359e147f">IRQ_MODE_CPU_ALL</a>&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
<tr class="memdesc:gad3d0505689768247c67495b7359e147f"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets all CPUs.  <a href="group__irq__mode__defs.html#gad3d0505689768247c67495b7359e147f">More...</a><br /></td></tr>
<tr class="separator:gad3d0505689768247c67495b7359e147f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacb276aa0488a9bf1aa56e1072d2a15a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gacb276aa0488a9bf1aa56e1072d2a15a5">IRQ_MODE_CPU_0</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
<tr class="memdesc:gacb276aa0488a9bf1aa56e1072d2a15a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 0.  <a href="group__irq__mode__defs.html#gacb276aa0488a9bf1aa56e1072d2a15a5">More...</a><br /></td></tr>
<tr class="separator:gacb276aa0488a9bf1aa56e1072d2a15a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab09616a5ccd05d75d81ab80a37387a9a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gab09616a5ccd05d75d81ab80a37387a9a">IRQ_MODE_CPU_1</a>&#160;&#160;&#160;(0x02UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
<tr class="memdesc:gab09616a5ccd05d75d81ab80a37387a9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 1.  <a href="group__irq__mode__defs.html#gab09616a5ccd05d75d81ab80a37387a9a">More...</a><br /></td></tr>
<tr class="separator:gab09616a5ccd05d75d81ab80a37387a9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3c8c5ec0226d772c3200d9efa2d3bf1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga3c8c5ec0226d772c3200d9efa2d3bf1a">IRQ_MODE_CPU_2</a>&#160;&#160;&#160;(0x04UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
<tr class="memdesc:ga3c8c5ec0226d772c3200d9efa2d3bf1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 2.  <a href="group__irq__mode__defs.html#ga3c8c5ec0226d772c3200d9efa2d3bf1a">More...</a><br /></td></tr>
<tr class="separator:ga3c8c5ec0226d772c3200d9efa2d3bf1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7fe46ac2f03063dc5ed2ca793c9cca85"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga7fe46ac2f03063dc5ed2ca793c9cca85">IRQ_MODE_CPU_3</a>&#160;&#160;&#160;(0x08UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
<tr class="memdesc:ga7fe46ac2f03063dc5ed2ca793c9cca85"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 3.  <a href="group__irq__mode__defs.html#ga7fe46ac2f03063dc5ed2ca793c9cca85">More...</a><br /></td></tr>
<tr class="separator:ga7fe46ac2f03063dc5ed2ca793c9cca85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d428c7ab66cb22eb375a109735e9a3a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga4d428c7ab66cb22eb375a109735e9a3a">IRQ_MODE_CPU_4</a>&#160;&#160;&#160;(0x10UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
<tr class="memdesc:ga4d428c7ab66cb22eb375a109735e9a3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 4.  <a href="group__irq__mode__defs.html#ga4d428c7ab66cb22eb375a109735e9a3a">More...</a><br /></td></tr>
<tr class="separator:ga4d428c7ab66cb22eb375a109735e9a3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga94faa9eab45bbc6fa6b2a3c9d92bbb37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga94faa9eab45bbc6fa6b2a3c9d92bbb37">IRQ_MODE_CPU_5</a>&#160;&#160;&#160;(0x20UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
<tr class="memdesc:ga94faa9eab45bbc6fa6b2a3c9d92bbb37"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 5.  <a href="group__irq__mode__defs.html#ga94faa9eab45bbc6fa6b2a3c9d92bbb37">More...</a><br /></td></tr>
<tr class="separator:ga94faa9eab45bbc6fa6b2a3c9d92bbb37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadb512fc8a31bc771c3ce0d006b821bb9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gadb512fc8a31bc771c3ce0d006b821bb9">IRQ_MODE_CPU_6</a>&#160;&#160;&#160;(0x40UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
<tr class="memdesc:gadb512fc8a31bc771c3ce0d006b821bb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 6.  <a href="group__irq__mode__defs.html#gadb512fc8a31bc771c3ce0d006b821bb9">More...</a><br /></td></tr>
<tr class="separator:gadb512fc8a31bc771c3ce0d006b821bb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa66525a1ee05c56f367540b2135e81ed"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaa66525a1ee05c56f367540b2135e81ed">IRQ_MODE_CPU_7</a>&#160;&#160;&#160;(0x80UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
<tr class="memdesc:gaa66525a1ee05c56f367540b2135e81ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 7.  <a href="group__irq__mode__defs.html#gaa66525a1ee05c56f367540b2135e81ed">More...</a><br /></td></tr>
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<tr class="memitem:gaacb93ae158e548c54698a7230647804a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaacb93ae158e548c54698a7230647804a">IRQ_MODE_ERROR</a>&#160;&#160;&#160;(0x80000000UL)</td></tr>
<tr class="memdesc:gaacb93ae158e548c54698a7230647804a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit indicating mode value error.  <a href="group__irq__mode__defs.html#gaacb93ae158e548c54698a7230647804a">More...</a><br /></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<p>The following codes are used as values for the parameter <em>mode</em> of the function <a class="el" href="group__irq__ctrl__gr.html#gab35da69354d2e515931580a1308a3a85">IRQ_SetMode</a> to configure interrupt line mode. They are also returned by the function <a class="el" href="group__irq__ctrl__gr.html#gadba142ee49ae8f52f76b603c926ad711">IRQ_GetMode</a> when retrieving interrupt line mode.</p>
<p>The values of <b>IRQ_MODE_TRIG_x</b> definitions specify The values of <b>IRQ_MODE_TYPE_x</b> definitions specify The values of <b>IRQ_MODE_DOMAIN_x</b> definitions specify The values of <b>IRQ_MODE_CPU_x</b> definitions specify</p>
<p>Interrupt mode bit-masks </p>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a id="gacb276aa0488a9bf1aa56e1072d2a15a5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacb276aa0488a9bf1aa56e1072d2a15a5">&#9670;&nbsp;</a></span>IRQ_MODE_CPU_0</h2>

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          <td class="memname">#define IRQ_MODE_CPU_0&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#gab09616a5ccd05d75d81ab80a37387a9a">&#9670;&nbsp;</a></span>IRQ_MODE_CPU_1</h2>

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          <td class="memname">#define IRQ_MODE_CPU_1&#160;&#160;&#160;(0x02UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
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<a id="ga3c8c5ec0226d772c3200d9efa2d3bf1a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3c8c5ec0226d772c3200d9efa2d3bf1a">&#9670;&nbsp;</a></span>IRQ_MODE_CPU_2</h2>

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          <td class="memname">#define IRQ_MODE_CPU_2&#160;&#160;&#160;(0x04UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ga7fe46ac2f03063dc5ed2ca793c9cca85">&#9670;&nbsp;</a></span>IRQ_MODE_CPU_3</h2>

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          <td class="memname">#define IRQ_MODE_CPU_3&#160;&#160;&#160;(0x08UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ga4d428c7ab66cb22eb375a109735e9a3a">&#9670;&nbsp;</a></span>IRQ_MODE_CPU_4</h2>

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          <td class="memname">#define IRQ_MODE_CPU_4&#160;&#160;&#160;(0x10UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
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<a id="ga94faa9eab45bbc6fa6b2a3c9d92bbb37"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga94faa9eab45bbc6fa6b2a3c9d92bbb37">&#9670;&nbsp;</a></span>IRQ_MODE_CPU_5</h2>

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          <td class="memname">#define IRQ_MODE_CPU_5&#160;&#160;&#160;(0x20UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
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<a id="gadb512fc8a31bc771c3ce0d006b821bb9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadb512fc8a31bc771c3ce0d006b821bb9">&#9670;&nbsp;</a></span>IRQ_MODE_CPU_6</h2>

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          <td class="memname">#define IRQ_MODE_CPU_6&#160;&#160;&#160;(0x40UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#gaa66525a1ee05c56f367540b2135e81ed">&#9670;&nbsp;</a></span>IRQ_MODE_CPU_7</h2>

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          <td class="memname">#define IRQ_MODE_CPU_7&#160;&#160;&#160;(0x80UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#gad3d0505689768247c67495b7359e147f">&#9670;&nbsp;</a></span>IRQ_MODE_CPU_ALL</h2>

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          <td class="memname">#define IRQ_MODE_CPU_ALL&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
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<a id="ga7498851a6a7f3e2c5e087041617f5be7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7498851a6a7f3e2c5e087041617f5be7">&#9670;&nbsp;</a></span>IRQ_MODE_DOMAIN_NONSECURE</h2>

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          <td class="memname">#define IRQ_MODE_DOMAIN_NONSECURE&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ga15cdeb10ef2b8081c5cd7a87e22e65e6">&#9670;&nbsp;</a></span>IRQ_MODE_DOMAIN_SECURE</h2>

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          <td class="memname">#define IRQ_MODE_DOMAIN_SECURE&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#gaacb93ae158e548c54698a7230647804a">&#9670;&nbsp;</a></span>IRQ_MODE_ERROR</h2>

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          <td class="memname">#define IRQ_MODE_ERROR&#160;&#160;&#160;(0x80000000UL)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#gaa9a8e0968a4ccd57eb7544a16d05f24d">&#9670;&nbsp;</a></span>IRQ_MODE_TRIG_EDGE</h2>

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          <td class="memname">#define IRQ_MODE_TRIG_EDGE&#160;&#160;&#160;(0x04UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ga8b0142ff767a9b1b1287e638eacf707b">&#9670;&nbsp;</a></span>IRQ_MODE_TRIG_EDGE_BOTH</h2>

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          <td class="memname">#define IRQ_MODE_TRIG_EDGE_BOTH&#160;&#160;&#160;(0x07UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ga99e0f3f6945991d50e766b19e71e0222">&#9670;&nbsp;</a></span>IRQ_MODE_TRIG_EDGE_FALLING</h2>

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          <td class="memname">#define IRQ_MODE_TRIG_EDGE_FALLING&#160;&#160;&#160;(0x06UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ga2dbbbb7100be0fee6e048cd3deb50e28">&#9670;&nbsp;</a></span>IRQ_MODE_TRIG_EDGE_RISING</h2>

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          <td class="memname">#define IRQ_MODE_TRIG_EDGE_RISING&#160;&#160;&#160;(0x05UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#gabc31ba71612436a6ccc49342f35fec58">&#9670;&nbsp;</a></span>IRQ_MODE_TRIG_LEVEL</h2>

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          <td class="memname">#define IRQ_MODE_TRIG_LEVEL&#160;&#160;&#160;(0x00UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
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<a id="gafeb539b2a564ca35abc57f87d71e7206"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafeb539b2a564ca35abc57f87d71e7206">&#9670;&nbsp;</a></span>IRQ_MODE_TRIG_LEVEL_HIGH</h2>

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          <td class="memname">#define IRQ_MODE_TRIG_LEVEL_HIGH&#160;&#160;&#160;(0x02UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
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<a id="ga326df9e34f6447583895a6f809ee160a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga326df9e34f6447583895a6f809ee160a">&#9670;&nbsp;</a></span>IRQ_MODE_TRIG_LEVEL_LOW</h2>

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          <td class="memname">#define IRQ_MODE_TRIG_LEVEL_LOW&#160;&#160;&#160;(0x01UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#gaec01a80010bc42b1482388ce3ae4d2a3">&#9670;&nbsp;</a></span>IRQ_MODE_TYPE_FIQ</h2>

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          <td class="memname">#define IRQ_MODE_TYPE_FIQ&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td>
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<a id="gab0d022bbd15beb1a6578b5535d95f9cf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab0d022bbd15beb1a6578b5535d95f9cf">&#9670;&nbsp;</a></span>IRQ_MODE_TYPE_IRQ</h2>

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          <td class="memname">#define IRQ_MODE_TYPE_IRQ&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td>
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